The invention relates to a circuit arrangement for voltage regulation.
For the operation of electrical and microelectronic circuits, DC voltages are required which have a voltage value that is complied with over the entire range of the power supply voltage fluctuations, load current fluctuations and temperature fluctuations that occur. For these reasons, a supply voltage is typically not directly suitable as operating voltage, but rather has to be stabilized and smoothed by means of a voltage regulator connected downstream that is provided specifically for this purpose.
Voltage regulators are available—according to the various applications—in a multiplicity of different embodiments and variants. With increasing integration of microelectronic circuits and also with the trend toward operating these microelectronic circuits with an ever lower voltage supply, there is increasingly a demand for voltage regulators having a very low voltage drop. Such voltage regulators are referred to in the relevant literature as so-called “low-drop” voltage regulators. Low-drop voltage regulators work correctly even when the voltage drop between the supply voltage and the regulated output voltage is less than 1 V and, in particular, corresponds to a fraction of a volt. The present invention and also the problem area on which it is based are described below with regard to low-drop voltage regulators, although without restricting the invention thereto.
An essential task of such low-drop voltage regulators is to provide a stabilized supply voltage for an electronic circuit or a corresponding load. In this connection it is desirable for the low-drop voltage regulator to have the best possible regulation characteristic, so that the stabilized output voltage that is regulated by said regulator and provided at the output is therefore as constant as possible. Furthermore, the low-drop voltage regulator should be able still reliably to regulate extremely low voltage drops. A further requirement is for the low-drop voltage regulator to provide a largest possible voltage range for the input voltage on the input side and for it to be able, in particular, to regulate both high and low input voltages. It is furthermore essential for the low-drop voltage regulator to have a minimum power consumption during operation and, moreover, a minimum power loss.
FIG. 1 of the drawing shows a circuit arrangement of a conventional low-drop voltage regulator, which in this case has a PMOS transistor 1 as output transistor. The PMOS 1 is arranged with its controlled path between a supply terminal 2 having a supply potential VDD and an output 3, at which a regulated output potential VOUT is present. The output potential VOUT is fed via a feedback path 8 to an amplifier 4, which compares the output potential VOUT with a reference potential VREF and generates, depending on this comparison, on the output side, a control potential for driving the PMOS transistor 1. What is problematic with this type of voltage regulation is the low stability of the regulating loop and a comparatively long response time, which can essentially be attributed to the use of the PMOS transistor 1.
It would be desirable, therefore, to use an NMOS transistor as output transistor since this component already has a very good regulation characteristic on account of its intrinsic properties. FIG. 2 shows a low-drop voltage regulator which has an NMOS transistor 5 connected in source follower connection as output transistor, that is to say which acts to a first approximation as a constant voltage source. In this case, the control terminal of the NMOS transistor 5 must be able to be charged to a voltage that is higher than the supply potential VDD. This can be realized in a simple manner by means of a charge pump 6, which charges the control terminal of the NMOS transistor 5. A discharging transistor 7 is furthermore provided, which, as necessary, discharges the control terminal of the NMOS transistor 5 again and thus switches off the NMOS transistor 5. The discharging transistor 7 can be driven by means of a signal derived from the output potential VOUT or a suitably chosen control signal. Such a low-drop voltage regulator is described in a similar form for example in U.S. Pat. No. 5,675,241.
What is problematic about this type of a low-drop voltage regulator is the power consumption thereof. The energy efficiency of such a circuit arrangement is relatively poor, since, with this type of voltage regulation, the charge pump 6 supplies the NMOS transistor 7 with a permanent charging current, which is then reduced again by the discharging transistor 7. If the NMOS transistor 7 is not supplied with a permanent charging current, then although a more favorable energy efficiency results, this is at the expense of a significantly poorer regulation characteristic.
FIG. 3 shows a further low-drop voltage regulator such as is described, for example, in European patent No. 0 846 996 B1. The voltage regulator in this case has two regulating stages 10, 11. An essential constituent part of the first regulating stage 10 is a charge pump 6, which supplies the NMOS transistor 5 with a charging current on the output side. The regulation of this first regulating stage 10 is relatively slow, although it enables a high gain on account of the relatively high charging current. Relatively fast disturbances are corrected by means of the second regulating stage 11, which although it provides a very fast regulation, nonetheless has a relatively low gain. A constituent part of the second regulating stage 11 is an inverting amplifier 12, which continuously compares the output potential VOUT, which is divided down by means of a voltage divider 13, with a reference signal VREF and provides a regulating potential VR on the output side depending on the comparison. By means of a capacitor 14, the potential is then matched to the control terminal of the NMOS transistor. At the same time, said regulating potential VR is fed to the charge pump 6 as control signal via an operational amplifier 15.
What is problematic about this solution, however, is that two regulating stages 10, 11 are required for regulating the output potential VOUT, which regulating stages are coupled to one another and thus virtually mutually impede one another in their action. By way of example, either the first regulating loop 10 is dominant, as a result of which the functioning thereof is then impeded by the second regulating loop 11, however. Alternatively, fast voltage changes are intended to be corrected, with the result that the second regulating loop 11 is then dominant. However, said second regulating loop 11 is then impeded in its action by the first regulating loop 10, and vice versa.
For the stability of the entire voltage regulation it is necessary, therefore, to provide a greater or lesser circuit outlay in order that both the slow regulation with high gain and at the same time the fast regulation with low gain are coordinated with one another. This is extremely difficult in many applications, particularly if a highly dynamic, i.e. very fast, correction of very low voltage drops is involved. In reality, this typically leads to a relatively complex circuit arrangement of the voltage regulator, in particular as far as the coordination of the two regulating circuits 11, 12 with one another is concerned. As a result of this additional circuitry outlay, however, this type of a low-drop voltage regulator becomes more or less cost-intensive, which in many applications does not justify the advantage obtained by the two-stage regulation.
In a manner similar to that in the case of the circuit arrangement in FIG. 2, in the case of the circuit arrangement in FIG. 3 as well, the control terminal of the NMOS transistor 5 is charged permanently since the charge pump 6 supplies said control terminal with a permanent charging current. This is not very energy efficient—in a similar manner to that in the case of the exemplary embodiment in FIG. 2.
To compound matters, the charge pump 6 is a regulated charge pump which therefore provides a variable output voltage in a manner dependent on its input voltage. The provision of a regulated charge pump is relatively costly and complex in terms of circuitry and is not especially efficient for energetic reasons.